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base:efficient_tod_initialisation [2019-05-12 20:34]
silverdr
base:efficient_tod_initialisation [2019-05-20 11:45] (current)
silverdr [Proper solution]
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 which correspond to the four possible C64 hardware setup combinations. Comparing to $51, which falls more or less in the middle, gives us the expected answer. If the HI byte of the timer has value higher than $51 we have 60Hz supplied to the TOD pin. If OTOH it has lower value, we have 50Hz supplied. which correspond to the four possible C64 hardware setup combinations. Comparing to $51, which falls more or less in the middle, gives us the expected answer. If the HI byte of the timer has value higher than $51 we have 60Hz supplied to the TOD pin. If OTOH it has lower value, we have 50Hz supplied.
 +
 +Advantages:
 +  * Does not break on Super-CPU and similar
 +  * No screen side-effects
 +  * Short and fast
  
 Please also note that we use CIA #2 and not CIA #1. CIA #2 is chosen because changing the timer values there does not affect regular IRQ timings. Moreover, KERNAL re-initialises those timers whenever it wants to use them. This saves as a few bytes, which would otherwise be needed to save and restore timer registers'​ original values. Last and least we do not disable NMIs as it is assumed that checking/​setting the params will be done as part of application initialisation,​ before setting up IRQ/NMI handlers. Please also note that we use CIA #2 and not CIA #1. CIA #2 is chosen because changing the timer values there does not affect regular IRQ timings. Moreover, KERNAL re-initialises those timers whenever it wants to use them. This saves as a few bytes, which would otherwise be needed to save and restore timer registers'​ original values. Last and least we do not disable NMIs as it is assumed that checking/​setting the params will be done as part of application initialisation,​ before setting up IRQ/NMI handlers.
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     ; we run on PAL machine with 60Hz TOD clock     ; we run on PAL machine with 60Hz TOD clock
 </​code>​ </​code>​
-we can determine not only the TOD frequency but also the video standard. This is possible because – unlike ​the TOD frequency – the CPU clock frequency is directly related to the computer'​s video standard. PAL computers have their CPU (and CIAs) clocked at 985248.444Hz while NTSC ones run faster and have their CPU/CIAs clocked at 1022727.14Hz. This is a side-effect of deriving all (except TOD) required clock frequencies from a single crystal of either 14318180Hz (for NTSC machines) or 17734472Hz (for PAL ones).+we can determine not only the TOD frequency but also the video norm. This is possible because – unlike TOD frequency – the CPU clock frequency is directly related to the computer'​s video standard. PAL computers have their CPU (and CIAs) clocked at 985248.444Hz while NTSC ones run faster and have their CPU/CIAs clocked at 1022727.14Hz. This is a side-effect of deriving all (except TOD) required clock frequencies from a single crystal of either 14318180Hz (for NTSC machines) or 17734472Hz (for PAL ones).
base/efficient_tod_initialisation.1557686044.txt.gz · Last modified: 2019-05-12 20:34 by silverdr